A Self-aligned Gate Definition Process with Submicron Gaps

A Self-aligned Gate Definition Process with Submicron Gaps.pdf

Dublin Core

Title

A Self-aligned Gate Definition Process with Submicron Gaps

Subject

This article discusses how self-aligned gate technology works.

Description

This article delves into self-aligned gate technology, which was crucial in the development of the Intel 4004.

Creator

Warmerdam, Aarnink, Hollerman, and Wallinga

Source

Institution of Electrical and Electronics Engineers

Publisher

Institution of Electrical and Electronics Engineers

Date

September 11-14, 1989

Citation

Warmerdam, Aarnink, Hollerman, and Wallinga, “A Self-aligned Gate Definition Process with Submicron Gaps,” Archive of the Present, accessed March 15, 2025, https://strundle.createunl.com/omeka/items/show/104.

Output Formats